1. Field of the Invention
The present invention relates to methods and apparatus for interconnecting and packaging miniature electronic components, such as integrated circuit chips and other devices to form larger systems.
2. Description of the Prior Art
Miniature electronic components are presently interconnected by a number of different schemes. A non-exhaustive list of such interconnection schemes includes: encapsulating the components in packages having leads which may be soldered to a substrate or inserted in a socket; tape automated bonding (TAB); and several hybridizing techniques wherein components are adhered to a substrate and connections are made by fine bonding wires, microscopically welded from bonding pads on the components to bonding pads on the substrate.
A more recent improvement to the hybridizing technique involves the placement of solder balls on substrate bonding pads located in a pattern matching the component bonding pads, placing the component on the substrate so that the component bonding pads align with the substrate bonding pads, and heating the combination so as to melt the solder. This technique results in a very good connection, because the surface tension of the melted solder helps align the component properly with the substrate, forming a good electrical and mechanical bond. However, the assembly is difficult to take apart if a single component needs to be repaired or replaced because the heating required to loosen one component may weaken bonds or cause bond to bond shorting due to reflow of solder attaching bonding pads of another component, not otherwise in need of repair.
The interconnection systems of the prior art result in either bulky systems as a result of package and lead frame size constraints or systems which are difficult to repair, such as the hybrids discussed above.
Bulky systems are disadvantageous because large spacing between components and consequently long interconnection wires results in high undesirable capacitance, high undesirable inductance and high undesirable signal propagation delays in the interconnection wiring. These characteristics limit the maximum usable speed of such systems. Furthermore, in systems using individual lead frames or device packages, up to one-half of the cost of a device may be the cost of the package.
Although hybridizing may somewhat relieve the space problem, current hybridizing techniques result in permanent assemblies, which may not be easily or economically repaired. For example, if a hybrid including three components contains one faulty component, the entire hybrid may be discarded, wasting the two good components and the expensive substrate. Therefore, it is not economical to build compact, large-scale systems by hybridization.
Thus, it is the overall aim of the present invention to provide an improved interconnection system for miniature components, such as integrated circuit chips.